マクロ定義 | |
#define | __MPU_PRESENT 0 |
#define | __NVIC_PRIO_BITS 2 |
#define | __Vendor_SysTickConfig 0 |
型定義 | |
typedef enum IRQn | IRQn_Type |
列挙型 | |
enum | IRQn { NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5, PendSV_IRQn = -2, SysTick_IRQn = -1, WAKEUP0_IRQn = 0, WAKEUP1_IRQn = 1, WAKEUP2_IRQn = 2, WAKEUP3_IRQn = 3, WAKEUP4_IRQn = 4, WAKEUP5_IRQn = 5, WAKEUP6_IRQn = 6, WAKEUP7_IRQn = 7, WAKEUP8_IRQn = 8, WAKEUP9_IRQn = 9, WAKEUP10_IRQn = 10, WAKEUP11_IRQn = 11, WAKEUP12_IRQn = 12, CAN_IRQn = 13, SSP1_IRQn = 14, I2C_IRQn = 15, TIMER_16_0_IRQn = 16, TIMER_16_1_IRQn = 17, TIMER_32_0_IRQn = 18, TIMER_32_1_IRQn = 19, SSP0_IRQn = 20, UART_IRQn = 21, ADC_IRQn = 24, WDT_IRQn = 25, BOD_IRQn = 26, EINT3_IRQn = 28, EINT2_IRQn = 29, EINT1_IRQn = 30, EINT0_IRQn = 31 } |
Configuration of the Cortex-M0 Processor and Core Peripherals
#define __MPU_PRESENT 0 |
MPU present or not
#define __NVIC_PRIO_BITS 2 |
Number of Bits used for Priority Levels
#define __Vendor_SysTickConfig 0 |
Set to 1 if different SysTick Config is used
enum IRQn |